In a manufacturing method of a semiconductor substrate, such as a semiconductor wafer W (hereinafter referred to as “wafer”) and an FPD substrate, there is a step for subjecting the substrate to an etching process under a reduced-pressure atmosphere. An example of a plasma etching apparatus for performing this step is briefly described with reference to FIG. 13.
In FIG. 13, the reference number 1 depicts a vacuum chamber. Disposed inside the vacuum chamber 1 is a stage 11 on which a substrate, e.g., a wafer W can be placed. There is disposed a process gas supply part 12 serving also as an upper electrode for generating a plasma in such a manner that the process gas supply part 12 is opposed to the stage 11. While a process gas is supplied from the process gas supply part 12 into the vacuum chamber 1, the vacuum chamber 1 is evacuated by a vacuum pump, not shown, through an exhaust channel 13. In addition, a radiofrequency power is applied from a radiofrequency power source 14 to the process gas supply part 12, so that a plasma of the process gas is generated in a space above the wafer W. Under this state, an etching process for the wafer W is performed. At this time, a temperature of the wafer is adjusted by a temperature adjusting means, not shown, incorporated in the stage 11.
When an etching process is performed, as shown in FIG. 14, for example, there is a possibility that an etching rate at a peripheral area of the wafer W may be higher than an etching rate at a central area thereof, depending on the kind of a film. In this case, as compared with the central area of the wafer w, the peripheral area thereof tends to be side-etched, which impairs the verticality of an etched shape. As cases in which this tendency can be noticeably seen, there are known an etching process of a gate electrode made of, e.g., polysilicon, which is used for a space in a gate structure, and an etching process of an anti-reflection film of a resist.
The reason for the higher etching rate in the peripheral area of the wafer W is inferred that the amount of active species, generated by the etching gas which has been made plasma, is larger in an area nearer to a side wall than in a central area in the vacuum chamber 1. In FIG. 14, the reference character P schematically depicts a state of the plasma.
On the other hand, in the aforementioned etching apparatus, various methods are employed for controlling an etching rate so as to reliably obtain a desired profile of the etching rate in a plane of the wafer W. One of the desired profiles is a profile of a uniform etching rate over all the plane of the wafer W.
In order to achieve this profile, as described in JP2005-033062A, for example, there may be employed a structure in which a focus ring is disposed on an area surrounding the wafer W on the stage 11. Alternatively, there may be employed a structure in which a wafer temperature is controlled by the temperature adjusting means incorporated in the stage 11 such that the wafer temperature is differed between the central area and the peripheral area of the wafer, or a structure in which a supply rate of a process gas from the process gas supply part 12 is controlled such that the supply rate is differed between the central area and the peripheral area of the wafer W. Alternatively, as described in JP2007-227829A, there may be employed a structure in which the process gas supply part has an invented shape.
However, in any conventional method of controlling the temperature of the stage 11, a temperature difference to be controlled is limited. Further, in any conventional method of controlling the supply rate of the process gas, the variation amount achieved in a resultant etching-rate profile is small (not sufficient). Furthermore, in the methods described in JP2005-033062A and JP2007-227829A, although a desired result can be obtained depending on the kind of a film to be etched, a satisfactory result cannot be obtained in the etching process of a gate electrode and in the etching process of an anti-reflection film.
The vacuum chamber 1 is formed of aluminum or the like. During the etching process, the vacuum chamber 1 itself, the stage 11 disposed therein, and other structural elements such as the focus ring are exposed to the plasma, and thus are in contact with the active species of the etching gas. Therefore, due to the repeated etching processes, there is a possibility that a metal component of the inner surface of the vacuum chamber 1 and/or a metal component of an outer surface of the structural elements (parts) may be etched and scattered, resulting in generation of particles. Thus, surfaces of structural elements which are likely to be etched by the plasma inside the vacuum chamber 1, such as the inner wall surface of the vacuum chamber 1 and a circumferential surface of the stage 11, are coated with Y (yttria), so as to prevent particle contamination caused by the above undesired etching.
However, when an etching condition is varied, there is a possibility that the yttria itself may be etched. In this case, the wafer W may be contaminated by the yttria. Therefore, there has been sought a technique for making the yttria surface denser and harder so as to make it difficult that the yttria surface is etched, for example, by heating the yttria surface coated on the vacuum chamber 1 and the like, by radiating a laser beam thereonto, and so on. However, this type of technique has not yet been in practical use.
Moreover, when the vacuum chamber 1 and the structural elements are exhausted by the etching, life spans thereof are shortened. Thus, an exchange cycle is shortened so that a cost for a part per time (COC) is increased, which invites an expensive price of the apparatus.